Brian E. Coss

Senior R&D Engineer

Broadcom Corporation

Fort Collins, Colorado

brian@briancoss.com

Education

Doctor of Philosophy, Materials Science and Engineering University of Texas at Dallas

December 2011, 4.0 GPA Richardson, TX

Masters of Science, Materials Science and Engineering University of Texas at Dallas

May 2008, 4.0 GPA Richardson, TX

Bachelor of Science, Physics Texas Tech University

May 2006, 3.95 GPA Lubbock, TX

High School Diploma Coppell High School

June 2002, 3.9 GPA Coppell, TX

Industry Positions

Broadcom WSD Fort Collins, CO
Master R&D Engineer (6) 05/2020 to Present

Project manager for FDC group consisting of 3 full time employees and 1 contractor
Responsible for FDC roadmap, delivering key improvements to infrastructure and software
Responsible for FDC expansion to all fab areas involved in WIP: Metrology, Test, and Facilities
Driving conversion of FDC application stack from VM centric design to container centric for greater flexibility and uptime
Driving database conversion from Oracle Data Appliances to Oracle Exadata server
Creation of 24x7 support framework: SR tracking system, procedures for shift technicians, on call rotation system, and 3 wide engineering coverage

Broadcom WSD Fort Collins, CO
Senior R&D Engineer (5) 05/2018 to 05/2020

Primary FDC application owner for entire WSD manufacturing fab
Implemented first ever fab-wide FDC control system covering 40 toolsets (~500 tools).
Designed and implemented high availability design (99.99% uptime) for the application
Released active tool interdictions (remote stops/tool down) for critical quality issues
Designed and released Spotfire report system for monitoring of key charts in real time
Authored operation, troubleshooting, and recovery documents for supporting application off hours 24/7
Enabled FDC application to be mission critical to fab operation, no longer able to run fab without FDC quality control
FDC protection enabled fab to run with best-in-class defectivity, fab shipped quality improved to defects in parts per million, defective wafers contained on site.

Broadcom WSD Fort Collins, CO
R&D Engineer (4) 08/2014 to 05/2018

Lead R&D effort exploring FDC application for WSD fab
Scoped, evaluated, and purchased 3rd party vendor FDC system
Implemented control systems, report systems, and interdiction systems to enable FDC within existing MES applications
Root caused and patched numerous service availability issues within the application and database designs
Worked hand in hand with 3rd party vendor to implement needed features to achieve success
Achieved first excursion containment at the lot-level using automated FDC principles
Built extensive monitoring systems for the FDC application to ensure uninterrupted service

Avago WSD Fort Collins, CO
Process Engineer (3) 12/2013 to 08/2014

Primary tool owner for 10 production metal evaporators and 1 Metapulse metrology tool
Supported multiple technologies (GaAs / Si) on a single toolset, managing all aspects of sustaining, development, and production
Implemented high dep rate 10A/s gold process with best-in-class particles to increase production run rate
Produced operating and maintenance documents to support high volume manufacturing processes.
Monitored tool health daily for issues using statistical process control and hands on in fab tool monitoring
Implemented first ever FDC control system for the fab on the metal evaporator toolset

Intel Hillsboro, OR
Process Engineer (7) 01/2012 to 12/2013

Tool owner for two multi-chamber high vacuum metal deposition tools (sputtering, atomic layer deposition, plasma enhanced chemical vapor deposition, and etching) on three technology nodes: 1270, 1272, 1274
Produced efficient operating schedules daily, covering sustaining, maintenance, and development work
Monitored tool health and module robustness for issues daily using statistical process control systems and applications
Authored and maintained tool specifications and procedures for maintenance, operations, and troubleshooting
Managed technicians to support tool operations
Planned and executed tool preventative maintenance
Resolved in-line issues identified by integration and yield which are correlated to the module, including troubleshooting of the issue, containment of the problem, root cause fix, and requalification of impacted tools
Developed contact metal process for new technologies by:

SEMATECH Austin, TX
Graduate Student Research Internship 06/2008 to 10/2011

Studied advanced planar and non-planar CMOS scaling
Design and integration of new process flow for FinFET test chip and contact resistance test chip
Research focused on: Schottky metal source/drain, FinFET, and alternative channels
Designed and executed independent experiments; Preformed electrical characterization and analysis

University of Texas at Dallas Richardson, TX

Research Assistant (Metal Gate / High-κ) 07/2006 to 11/2011

Studied TaN and TaLaN for EWF tuning in high-κ NMOS
Clean room experience with deposition, lithography, and processing tools
Extensive experience with an ultra high vacuum in-situ cluster tool
Presented at the 2010 International Electron Device Meeting, and the 2009 VLSI Symposium

Graduate Course Work (2006 – 2008)

Skills / Abilities

Considerable ability to work either self-directed or in team situations
Able to thoroughly plan and execute experiments
Infinite learner
Effective and efficient time management
Computer Programming and Simulation; SciKit, Python, C++, MATLAB, bash, React, Node.js
Highly computer literate; MacOSX, Unix, Linux, Windows
Strong problem-solving abilities
Excellent writing skills

Honors / Achievements

Publications and references available upon request